The present invention generally relates to a system for memory access, and more particularly to a remote memory processor architecture.
In a typical wireless local area network (WLAN) configuration, a portable or mobile device (e.g., a laptop personal computer) normally includes a HOST processor and an associated communications module in the form of a PCI or PCMCIA card. Typically, a Medium Access Control (MAC) processing system, a PHY (physical layer) processing device (e.g., a digital signal processor), and a main memory reside on this card. This card typically takes the form of a printed circuit board (PC board) which connects all the components.
The MAC processing system includes a MAC processor (i.e., an embedded processor with associated off-chip memory and other custom logic located on a single integrated circuit). The MAC embedded processor is a multi-functional processor engine responsible for a variety of different processing tasks associated with the wireless communications. The PHY processing device performs such functions as encoding/decoding waveforms. Data is transferred between the MAC processing system and the HOST processor during data processing operations.
The trend toward low cost processors is often a driving force in the design of many embedded systems. Typically, custom Application-Specific Integrated Circuit (ASIC) devices are built around a central processor core (CPU), along with on-chip embedded memory (e.g., RAM, ROM and/or other auxiliary memory) and interface units to form a complete embedded processor. To achieve low cost for the overall bill of material for the entire PC board, silicon integration is used to combine what were previously separate integrated circuits on a PC board into a single integrated circuit. Such embedded processors often include an external memory interface which is used to access a memory space (e.g., off-chip memory located on the PC board) that is larger than that which can be placed on the single integrated circuit as on-chip memory or embedded memory. Due to the need for higher performance and increased software functionality, designers must rely on fast off-chip memories which can meet the low latency demands of high-speed embedded processors. Even with fast off-chip memories, the off-chip memory access speed requirements often constitute a bottleneck which compromise the overall speed of the embedded processor, which is often capable of speeds above 100 MHz or more, if it was not for the slow external memory interface.
It should be appreciated that the term xe2x80x9coff-chip memoryxe2x80x9d is used herein to refer to memory that is on the same PC board, but not the same integrated circuit as the embedded processor. The term xe2x80x9cremote external memoryxe2x80x9d refers to memory which is neither on the same PC board nor the same integrated circuit as the processor. The term xe2x80x9con-chip memoryxe2x80x9d or xe2x80x9cembedded memoryxe2x80x9d is used herein to refer to memory which resides on the same integrated circuit as the ASIC embedded processor.
Furthermore, in small environments where PC board real-estate is a premium (such as mini-PCI and Cardbus form factors) off-chip memories take up valuable area of a card. Since RAMs require parallel address and data lines, as well as various control signals, they often pose a further challenge to board routing which adds to the overall system size. In portable environments, off-chip RAMs which are clocked at high speeds often consume a great deal of power. Also, the cost of off-chip RAM is expensive, often meeting or exceeding the cost of the ASIC embedded processor. Cost sensitivity in the consumer market is yet another reason making off-chip memories less attractive.
According to the present invention there is provided a remote memory processor architecture a remote memory processing system, comprising: a first processor including a CPU and a first memory, the CPU and the first memory located on a common integrated circuit; a second processor having an associated second memory; and a bus, wherein the first processor communicates with the second processor via said bus; wherein said first processor accesses the second memory, if it is determined that the first memory does not have the memory address that the first processor desires to access.
According to another aspect to the present invention there is provided a remote memory processor architecture a method of accessing data in a system comprised of a first processor including a CPU and a first memory, the CPU and the first memory located on a common integrated circuit; a second processor having an associated second memory; and a bus, wherein the first processor communicates with the second processor via said bus, said method including the steps of: accessing said first memory to access a selected memory address; determining whether the selected memory address is located in said first memory; and accessing said second memory if the selected memory address is not located in said first memory.
Yet another aspect to the present invention there is provided a remote memory processor architecture a remote memory processing system, comprising:
first processing means including a first memory means, the first memory means located on the same integrated circuit as a processing unit; second processing means having an associated second memory means; and connecting means for communicating data between said first processing means and said second processing means wherein said first processing means accesses the second memory means, if it is determined that the first memory means does not have the memory address that the first processing means desires to access.
An advantage of the present invention is the provision of a remote memory processor architecture which reduces the cost of a communications module.
Another advantage of the present invention is the provision of a remote memory processor architecture which reduces power consumption of a communications module.
Still another advantage of the present invention is the provision of a remote memory processor architecture which reduces the amount of PC board real-estate needed for a communications module.
Yet another advantage of the present invention is the provision of a remote memory processor architecture which provides a more efficient communications module.
Still other advantages of the invention will become apparent to those skilled in the art upon a reading and understanding of the following detailed description, accompanying drawings and appended claims.